1. Field of the Invention
The present disclosure relates to a substrate for a display device, and more particularly, to a method for identifying shift levels of fine patterns formed on a substrate for a display device.
2. Discussion of the Related Art
As display devices, which can substitute for a cathode ray tube, a liquid crystal display device, a plasma display panel, and an organic light emitting display device have been developed.
The display device is manufactured by forming various types of fine patterns such as a thin film transistor on a substrate, and various types of test processes are performed to determine whether there is a defect in the display device during a manufacturing process of the display device or after the manufacturing process is completed.
As one of the test processes of the display device, there is provided a process for identifying shift levels of fine patterns formed on a substrate.
Hereinafter, a method for identifying shift levels of fine patterns formed on a substrate for a display device according to the related art will be described with reference to the accompanying drawings.
FIGS. 1a and 1b are plane views illustrating a method for identifying shift levels of fine patterns according to the related art.
Prior to description of a detailed process, a layout of an entire substrate will be described in brief with reference to FIGS. 1a and 1b. A plurality of active regions 10, for example, two active regions 10 may be formed on a substrate 1. Each of the active regions is cut by a scribing process, and then constitutes a panel of the display device.
Each of the active regions 10 constituting the panel of the display device is provided with various types of patterns 11 and 12, and overlay patterns 21 and 22 are formed outside the active regions 10 to identify shift levels of the patterns 11 and 12.
Hereinafter, each process will be described in more detail.
First of all, as shown in FIG. 1a, the first pattern 11 is formed on the active region 10 of the substrate 1, and at the same time the first overlay pattern 21 is formed outside the active region 10.
An example of the first pattern 11 may include a gate line arranged in a horizontal direction, and the first overlay pattern 21 may be formed in a square structure, for example.
The first pattern 11 and the first overlay pattern 21 may be formed through a patterning process such as photolithography. In this case, the first pattern 11 and the first overlay pattern 21 may be formed at the same time using a first mask pattern corresponding to the first pattern 11 and the first overlay pattern 21.
Next, as shown in FIG. 1b, the second pattern 12 is formed on the active region 10 of the substrate 1, and at the same time the second overlay pattern 22 is formed outside the active region 10.
An example of the second pattern 12 may include a data line arranged in a vertical direction, and the second overlay pattern 22 may be formed in a square structure arranged within the first overlay pattern 21, for example.
The second pattern 12 and the second overlay pattern 22 may be formed through a patterning process such as photolithography. In this case, the second pattern 12 and the second overlay pattern 22 may be formed at the same time using a second mask pattern corresponding to the second pattern 12 and the second overlay pattern 22.
According to the aforementioned related art method, the shift levels of the first pattern 11 and the second pattern 12 are identified using the first overlay pattern 21 and the second overlay pattern 22, which are formed outside the active region 10.
In other words, since the first pattern 11 and the first overlay pattern 21 are formed using the first mask pattern at the same time, if a process error such as misalignment of the first mask pattern occurs, the first pattern 11 and the first overlay pattern 21 may be shifted at the same level.
Also, since the second pattern 12 and the second overlay pattern 22 are formed using the second mask pattern at the same time, if a process error such as misalignment of the second mask pattern occurs, the second pattern 12 and the second overlay pattern 22 may be shifted at the same level.
Since the first pattern 11 and the second pattern 12 are finely formed within the active region 10, it is not easy to identify the shift levels of the first pattern 11 and the second pattern 12. Accordingly, the shift level of the first pattern 11 is identified through the shift level of the first overlay pattern 21, and the shift level of the second pattern 12 is identified through the shift level of the second overlay pattern 22.
However, the aforementioned related art method has problems as follows.
According to the related art method, if a process error occurs, it is regarded that the shift level of the first pattern 11 is the same as that of the first overlay pattern 21 and the shift level of the second pattern 12 is the same as that of the second overlay pattern 22. However, the shift level of the first pattern 11 is not the same as that of the first overlay pattern 21 actually. Likewise, the shift level of the second pattern 12 is not the same as that of the second overlay pattern 22 actually.
In other words, even though it is determined that the first pattern 11 and the second pattern 12 are formed exactly as a shift between the first overlay pattern 21 and the second overlay pattern 22 does not occur, it is likely to be determined through a later accurate test process that the first pattern 11 and the second pattern 12 are not formed exactly.
For this reason, if the shift levels of the first pattern 11 and the second pattern 12 are determined using the shift levels of the first overlay pattern 21 and the second overlay pattern 22, an error in determining the shift levels may occur.
In addition, according to the related art method, the first overlay pattern 21 and the second overlay pattern 22 are formed outside the active region 10 constituting the panel of the display panel. Accordingly, since the first overlay pattern 21 and the second overlay pattern 22 do not exist in the panel after the scribing process, a problem occurs in that the first overlay pattern 21 and the second overlay pattern 22 cannot be used in a state of the panel.